To reduce the power consumption of a semiconductor device, unnecessary operation of circuits is stopped by power gating or clock gating. A flip-flop circuit (FF) is a sequential circuit (memory circuit that holds a state) included a lot in a semiconductor device. Thus, a reduction in power consumption of the FF leads to a reduction in power consumption of the whole semiconductor device incorporating the FF. When a general FF is simply powered off, a state (data) held therein is lost.
By taking advantage of an extremely low off-state current of a transistor whose semiconductor region is formed using an oxide semiconductor layer (hereinafter, such a transistor may be referred to as an OS transistor), a holding circuit capable of holding a state (data) even when powered off has been proposed. According to Patent Documents 1 to 3, for example, an FF incorporates a holding circuit including an OS transistor, leading to power gating of the FF.